Design Verification is one of the most important aspects of the IC development process, consuming 60% – 80% of the total IC development resources and time. We offer a wide range of solutions in pre-silicon design verification that will allow fast and reliable product development for our customers. With over 14 years’ experience providing verifications to semiconductor, defense, telecommunications, medical, automotive + more.
Verification Activities Elsys Supports:
- SoC
- IP
- Sub System
- Digital Mixed Signal
HDL AND SOFTWARE LANGUAGES
Our engineering teams are advanced users / experts of a range of HDL and software languages, which includes:
- VHDL
- Verilog
- System Verilog
- C/C++
- Python, Bash, TCL, Perl
METHODOLOGIES AND DEVELOPMENT CYCLES
Here is a range of methodologies our engineering teams implement, depending on customer preference:
- AGILE
- Direct methodologies
- eRM
- UVM
- V-cycle
- DO 254
- SIL
- ISO26262