Design Verification Engineer – Team Lead
Key Responsibilities / Duties:
- verification methodology establishment
- development of verification environment
- developing test and functional coverage plans based on device specifications
- analyzing and debugging simulation failures, as well as analyzing functional coverage results
- verification progress tracking
- managing your own team, monitoring the careers of your team members and close interaction with clients and management
Qualification Requirements:
- More than 5 years of relevant experience
- Team leadership skills
- Project management skills with a proven record of successful verification projects
- Strong background in digital electronics, ASIC/FPGA
- Good Knowledge of processor architecture and Systems On Chip
- Good knowledge of UVM, Specman/e or System Verilog
- Good Knowledge of C/C++
- Knowledge of scripting tolls and languages is an advantage
- Mobility is a plus
- Highly motivated, well organized and team player
- Good knowledge of English language
Benefits:
- Integration program in a professional, young & dynamic team
- Professional development opportunities
- Competitive salaries & benefits
- Compensation package includes also additional health insurance, sport & social activities
- International work environment
You can find out more about our benefits here.
